Qualidade de serviço em redes intra-chip: implementação e avaliação sobre a rede Hermes

• Ano de defesa: 2006
• Autor(a) principal: Mello, Aline Vieira de
• Orientador(a): Moraes, Fernando Gehm
• Tipo de documento: Dissertação
• Tipo de acesso: Acesso aberto
• Idioma: por
• Instituição de defesa: Pontifícia Universidade Católica do Rio Grande do Sul; Porto Alegre
• Palavras-chave em Português: INFORMÁTICA; ARQUITETURA DE REDES; REDES DE COMPUTADORES
• Link de acesso: http://hdl.handle.net/10923/1511

The proposition of Networks-on-Chip (NoCs) for modern and future embedded systems capitalizes on the fact that busses present performance degradation when shared by a great number of cores. Even if NoC research is a relatively young field, the literature abounds with propositions of NoC architectures. Several of these propositions claim providing quality of service (QoS) guarantees, which is essential for e. g. real time and multimedia applications. The most widespread approach to attain some degree of QoS guarantee relies on a two-step process. The first step is to characterize application performance through traffic modeling and simulation. The second step consists in tuning a given network template to achieve some degree of QoS guarantee. These QoS targeted NoC templates usually provide specialized structures to allow either the creation of connections (circuit switching) or the assignment of priorities to connectionless flows. It is possible to identify three drawbacks in this two-step process approach. First, it is not possible to guarantee QoS for new applications expected to run on the system, if those are defined after the network design phase. Second, even with end-to-end delay guarantees, connectionless approaches may introduce jitter. Third, to model traffic precisely for a complex application is a very hard task. If this problem is tackled by oversimplifying the modeling phase, errors may arise, leading to NoC parameterization that is poorly adapted to achieve the required QoS. This work has two main objectives. The first one is to evaluate the area-performance trade-off and the limitations of circuit switching and priority scheduling to meet QoS. This evaluation shows where such implementations are really suited for achieving QoS guarantees, and when more elaborate mechanisms to meet QoS are needed. The second objective is to propose the use of a rate-based scheduling to achieve QoS requirements considering the execution time state of the NoC. The evaluation of circuit switching and priority scheduling show that: (i) circuit switching can guarantee QoS only to a small number of flows, this technique presents low scalability and can potentially waste significant bandwidth; (ii) priority-based approaches may display best-effort behavior and, in worst-case situations, may lead to unacceptable latency for low priority flows, besides being subject to jitter. In face of these limitations, rate-based scheduling arises as an option to improve the performance of QoS flows when varying traffic scenarios are used.