PadsTool: uma Ferramenta Gráfica para Mapeamento e Posicionamento dos Pads

• Ano de defesa: 2013
• Autor(a) principal: Primo, João Janduy Brasileiro
• Tipo de documento: Dissertação
• Tipo de acesso: Acesso aberto
• Idioma: por
• Instituição de defesa: Universidade Federal da Paraí­ba; BR; Informática; Programa de Pós Graduação em Informática; UFPB
• Palavras-chave em Português: Floorplanning; Pad; EDA; mapeamento; posicionamento; script; mapping; positioning; CNPQ::CIENCIAS EXATAS E DA TERRA::CIENCIA DA COMPUTACAO
• Link de acesso: https://repositorio.ufpb.br/jspui/handle/tede/6126

EDA Tools (Electronic Design Automation) are used to facilitate the project and layout of Integrated Circuits (IC). Floorplanning is an important step in the layout design phase of the development of an IC. In this step the macroblocks are positioned on the chip, and the following properties are determined: the location of input and output pads, the location of the power pads and the strategies of distribution of the power and clock signal by the core. Commonly a wrapper in HDL that maps the input and output ports of the project in instances of pads is done, with the different types, defined by the developer and a file that indicates the position of each pad on the circuit. Thus, both the mapping and positioning are usually manually done through scripts, generating a great difficulty for developers, because an IC with a reasonable amount of inputs and outputs becomes extremely susceptible to human failure. These files are generally used by all EDA tools as well as by the Design kits suppliers, moreover, the tools have different syntaxes for the files. This work shows a tool with a GUI (Graphical User Interface) able to provide to the developers an easy and intuitive way to manage both the mapping and positioning of the pads, making the process faster and less susceptive to human failure. To validate the work, the tool is tested on some IC projects