Desenvolvimento de um circuito aritmético a partir da sua especificação em Handel-C

• Autor(a) principal: Almeida, Pedro
• Data de Publicação: 2003
• Outros Autores: Almeida, Manuel
• Tipo de documento: Artigo
• Idioma: por
• Título da fonte: Repositórios Científicos de Acesso Aberto de Portugal (RCAAP)
• Texto Completo: https://proa.ua.pt/index.php/revdeti/article/view/17811

This paper describes an FPGA-based circuit that implements four arithmetical operations (+, -, *, /) and interacts with a monitor and a mouse attached to the FPGA.Functionality of the circuit has been described in Handel-C, which is a system-level specification language, developed by Celoxica. The Handel-C specification was verified in Celoxica DK1 design suite and translated to EDIF file that was converted in Xilinx ISE 5.1 environment to a bitstream for FPGA. The designed circuit was tested in FPGA Spartan-II XC2S200, which is a primary reconfigurable component of RC100 board supplied by Celoxica. The paper demonstrates some additional opportunities of Handel-C and DK1, such as generation of a synthesizable VHDL code.