Desenvolvimento de um circuito em Handel-C para experiências com máquinas de estados finitos

• Main Author: Arrais, Joel
• Publication Date: 2003
• Format: Article
• Language: por
• Source: Repositórios Científicos de Acesso Aberto de Portugal (RCAAP)
• Download full: https://proa.ua.pt/index.php/revdeti/article/view/17769

This paper describes an FPGA-based circuit, which permits to specify and to simulate finite state machines (Moore model). Interaction with the circuit is provided through a graphical interface designed for a VGA monitor with the relevant support for a mouse and a keyboard. Functionality of the circuit was described in Handel-C, which is a system-level specification language developed by Celoxica. The Handel-C description wasverified in Celoxica DK1 environment and compiled to an EDIF file. The latter was used as an input for ISE 5.2 software, which generated a bitstream for an FPGA. The designed circuit was tested in the RC100 prototyping board of Celoxica that contains an FPGA XC2S200 of Spartan-II family of Xilinx.