Domain-specific and general-purpose acceleration in reconfigurable and Vector processor platforms

• Ano de defesa: 2019
• Autor(a) principal: Alves, Fredy Augusto Maciel
• Tipo de documento: Dissertação
• Tipo de acesso: Acesso aberto
• Idioma: eng
• Instituição de defesa: Universidade Federal de Viçosa; Ciência da Computação
• Palavras-chave em Português: Processamento paralelo (Computadores); Processadores de matriz; Arranjos de lógica programável em campo; Ciência da Computação
• Link de acesso: https://locus.ufv.br//handle/123456789/30986

Many heterogeneous CPU-FPGA platforms have emerged in the past few years ranging from large systems to single chip nodes. In this work we present three different papers implemented on this type of heterogeneous platform. The first one explains the implemen- tation of a collision detector accelerator, the second one compares this implementation to a boolean gene regulatory network accelerator and other applications, it derives lessons learned about what to take into consideration before implementing for heterogeneous systems. The third paper compares two different vector processor ISAs, vector register (VR) and vector memory (VM). It shows the advantages of using VM over VR. The focus of the first and second work is on the acceleration of specific applications for a specific platform, the focus of the third one is to compare two different vector ISAs on the same platform for both. Keywords: FPGA. Vector Processor. Hardware Accelerator.