Estudo e desenvolvimento de uma fonte CA de potência híbrida baseada em conversor multinível modular
Ano de defesa: | 2013 |
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Autor(a) principal: | |
Orientador(a): | |
Banca de defesa: | |
Tipo de documento: | Dissertação |
Tipo de acesso: | Acesso aberto |
Idioma: | por |
Instituição de defesa: |
Universidade Federal de Santa Maria
BR Engenharia Elétrica UFSM Programa de Pós-Graduação em Engenharia Elétrica |
Programa de Pós-Graduação: |
Não Informado pela instituição
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Departamento: |
Não Informado pela instituição
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País: |
Não Informado pela instituição
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Palavras-chave em Português: | |
Link de acesso: | http://repositorio.ufsm.br/handle/1/8545 |
Resumo: | This Master Thesis presents an AC Power Source (ACPS) study contribution through the proposal, design and implementation of a novel hybrid ACPS topology. In general, the proposed hybrid topology is defined from the series connection between a Modular Multilevel Converter (MMC), called main amplifier, and a Linear Power Amplifier (LPA), called correction amplifier. With this connection, the proposed ACPS enables the output waveform synthesis with high fidelity when compared to the reference waveform, also with a high bandwidth. The main contribution of the proposed topology is to allow the simplification of the main amplifier input stage, since the MMC requires a common DC bus for providing power to the load. Throughout this study, a linear amplifier DC bus design is presented, since it influences directly the ACPS performance. Regarding the main amplifier, dynamic models are presented for the control system design, which will ensure the circulating component minimization in the MMC poles, as well as ensuring the converter power flow balance by controlling the sum and subtraction of the capacitor voltages. Additionally, the pole inductors design considering the current ripple at the switching frequency is also presented. The ACPS prototype consists of eight half-bridge submodules, triggered by the control system implemented on a Digital Signal Processor (DSP) and through the selection algorithm implemented on a Field-Programmable Gate Array (FPGA). Finally, experimental results are provided in order to guarantee the employed methodology in the main and correction amplifiers design, through bench test prototype. |