Digitally driven control for inductive buck converters in portable battery-powered applications
Ano de defesa: | 2024 |
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Autor(a) principal: | |
Orientador(a): | |
Banca de defesa: | |
Tipo de documento: | Dissertação |
Tipo de acesso: | Acesso aberto |
Idioma: | por |
Instituição de defesa: |
Universidade Federal da Paraíba
Brasil Engenharia Elétrica Programa de Pós-Graduação em Engenharia Elétrica UFPB |
Programa de Pós-Graduação: |
Não Informado pela instituição
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Departamento: |
Não Informado pela instituição
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País: |
Não Informado pela instituição
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Palavras-chave em Português: | |
Link de acesso: | https://repositorio.ufpb.br/jspui/handle/123456789/33042 |
Resumo: | In this work, a digitally driven control system for an integrated fixed-frequency inductive buck converter is presented. A comprehensive review of small signal modeling and compensation is included, with a digital control based on a standard Proportional Integral Derivative (PID) controller. To enable this control, focus was given on optimizing the Analog to Digital Converter (ADC) and the Digital Pulse Width Modulator (DPWM) for the intended application. The novel ADC architecture achieves a typical step size of 2.136 mV, a quiescent current of 15.5 µA and an estimated area of 0.0088 mm2. The proposed DPWM incorporates a feed-forward of the input voltage to boost line regulation and includes a thermometer encoded capacitor array to improve Differential Nonlinearity (DNL). The typical quiescent current of the DPWM is 35.1 µA with an estimated area of 0.0439 mm2. Special care was taken to ensure the robustness of the ADC and DPWM against mismatch, process, temperature, and supply voltage variations. The proposed control architecture can be applied to implement DC-DC converters for portable applications, powered either by a Lithium-Ion battery (2.7 V to 4.2 V) or, during the charging of the battery, via a USB port (4.7 V to 5.5 V). The load current may vary from 0 to 200 mA, the switching frequency is 2 MHz, and the output voltage aligns with the range of the native transistors available in the CMOS 180 nm technology adopted (1.62 V to 1.98 V). |