Implementação de um algoritmo evolutivo utilizando a representação nó-profundidade-grau no processador Nios II do FPGA

Detalhes bibliográficos
Ano de defesa: 2013
Autor(a) principal: Vinhal, Gustavo Siqueira
Orientador(a): Soares, Telma Woerle de Lima lattes
Banca de defesa: Soares, Telma Woerle de Lima, Soares, Anderson da Silva, Gabriel, Paulo Henrique Ribeiro
Tipo de documento: Dissertação
Tipo de acesso: Acesso aberto
Idioma: por
Instituição de defesa: Universidade Federal de Goiás
Programa de Pós-Graduação: Programa de Pós-graduação em Ciência da Computação (INF)
Departamento: Instituto de Informática - INF (RG)
País: Brasil
Palavras-chave em Português:
Palavras-chave em Inglês:
Área do conhecimento CNPq:
Link de acesso: http://repositorio.bc.ufg.br/tede/handle/tede/3291
Resumo: Many relevant problems to NP-Hard class are present in the real world. Among them we can mention the problems of network design (PNDs) that involve electricity distribution, vehicle traffic, and others. There are not algorithms which provide a exact solution for these types of problems with an acceptable computation time. Over the years, research has been developed used evolutionary algorithms (EAs) to provide an efficient solution with a acceptable computation time for these problems. In addition, appropriate data structures may further improve the performance of EAs to PNDs. The node-depth-degree (NDDE) representation have show significant results for PNDs. The application of EAs in hardware can improve the performance of the algorithm. In this sense, this work presents the implementation of a EA in Nios II processor of a FPGA board to solving the PND minimum spanning tree with degree constraint. The results demonstrate that the implementation of EAs in hardware brings significant results with better performance, due to the power of parallelism present in the FPGA.