Simulador de arquitetura para processamento de imagens usando programação genética cartesiana

Detalhes bibliográficos
Ano de defesa: 2013
Autor(a) principal: Paris, Paulo Cesar Donizeti
Orientador(a): Pedrino, Emerson Carlos lattes
Banca de defesa: Não Informado pela instituição
Tipo de documento: Dissertação
Tipo de acesso: Acesso aberto
Idioma: por
Instituição de defesa: Universidade Federal de São Carlos
Programa de Pós-Graduação: Programa de Pós-Graduação em Ciência da Computação - PPGCC
Departamento: Não Informado pela instituição
País: BR
Palavras-chave em Português:
Palavras-chave em Inglês:
Área do conhecimento CNPq:
Link de acesso: https://repositorio.ufscar.br/handle/20.500.14289/560
Resumo: The tools offered by the area of Mathematical Morphology are very effective when applied to the analysis of binary images, which it is of great importance in areas such as: robotic vision, visual inspection, among others. Such tools, beside to Evolutionary Computation and based on genotype-phenotypes mappings allow computational tasks be performed automatically without explicit programming, which leads to the motivation, in the search of a way of reducing the degree of difficulty often found by human experts in performing tasks of selecting linear operators to be used in morphological filters. Moreover, if such tasks require fast processing on the images, it is necessary the use of architectures implemented in hardware, which it is not too trivial to be done. In this work, a hardware architecture simulator has been implemented for image processing, based on Cartesian Genetic Programming, which automatically builds filters for processing binary images, i.e., automatically build a sequence of logical and morphological operators that produces filters to obtain an approximate of the desired images. The results obtained from several experiments of transformation of these images are presented and comparatively analyzed in relation to previous results available in the literature. Based on these results, it will be possible to study the behavior of such architecture, through the variation of the parameters of the genetic procedure in the simulator environment. Thus, it will be possible to infer if the architecture is suitable or not for a desired application, so facilitating the process of design and implementation of it in hardware.