Power amplifier linearization platform

• Main Author: Maltez, João André Margarido
• Publication Date: 2024
• Format: Master thesis
• Language: eng
• Source: Repositórios Científicos de Acesso Aberto de Portugal (RCAAP)
• Download full: http://hdl.handle.net/10773/45075
• topic: RF power amplifier; Distortion compensation; Linearization platform; Digital predistortion; Laboratory measurements

Amplifiers are electronic circuits commonly utilized in wireless telecommunications signal transmission systems. These circuits are often located at the end of the transmission chain and are designed to provide, at the output, an amplified replica of the input signal. Due to their non-ideal nature, amplifiers begin to saturate at elevated amplitudes, distorting the output signal, which is often prohibitive in communication systems, since it may interfere with frequency channels assigned for other operators. One possible approach to mitigate this distortion is by creating highly linear amplifiers; however, this would make the amplifier extremely inefficient, resulting in the majority of the power provided to the circuit being dissipated as heat. A predistorter is a different approach used to mitigate distortion. This block is located prior to the amplifier and seeks to perform the inverse function of the amplifier’s characteristics, thereby causing the circuit containing the predistorter and amplifier to be linear. This dissertation addresses the development of a platform that evaluates the linearization level of an amplifier circuit when subjected to complex predistortion techniques. This linearization platform is able to perform all the steps required to calculate the coefficients of digital predistorter (DPD) algorithms which lead to the minimization of the distortion level at the output of the power amplifier (PA) under test, implementing iterative algorithms that successively adjust the DPD coefficients and measure the PA output distortion (keeping the average power level of the output signal). This setup can be used for any single-input PA that is mounted on the test bench, and the DPD to consider can be selected from a list of possible algorithms (and the user can update this list with additional DPD models). To make this linearization setup easy to use, a dedicated user interface was created that, through very intuitive commands and graphics, allows the user not only to follow the evolution of the linearization process, as to control its flow step by step. At each iteration of the DPD coefficient estimation process, the user interface provides graphical and numerical information about the attained linearization level of the DPD+PA chain. The overall system allows the user to assess the level of linearization that a particular PA circuit can achieve, when excited by a user specified input signal, by simply performing a set of high level configurations and commands.