Memory Feasibility Analysis of Parallel Tasks Running on Scratchpad-Based Architectures

Detalhes bibliográficos
Autor(a) principal: Casini, Daniel
Data de Publicação: 2018
Outros Autores: Biondi, Alessandro, Nelissen, Geoffrey, Buttazzo, Giorgio
Idioma: eng
Título da fonte: Repositórios Científicos de Acesso Aberto de Portugal (RCAAP)
Texto Completo: http://hdl.handle.net/10400.22/12864
Resumo: This work proposes solutions for bounding the worst-case memory space requirement for parallel tasks running on multicore platforms with scratchpad memories. It introduces a feasibility test that verifies whether memories are large enough to contain the maximum memory backlog that may be generated by the system. Both closed-form bounds and more accurate algorithmic techniques are proposed. It is shown how one can use max-plus algebra and solutions to the max-flow cut problem to efficiently solve the memory feasibility problem. Experimental results are presented to evaluate the efficiency of the proposed feasibility analysis techniques on synthetic workload and state-of-the-art benchmarks.
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spelling Memory Feasibility Analysis of Parallel Tasks Running on Scratchpad-Based ArchitecturesReal-timeMemory feasibilityParallel tasksScratchpad memoriesThis work proposes solutions for bounding the worst-case memory space requirement for parallel tasks running on multicore platforms with scratchpad memories. It introduces a feasibility test that verifies whether memories are large enough to contain the maximum memory backlog that may be generated by the system. Both closed-form bounds and more accurate algorithmic techniques are proposed. It is shown how one can use max-plus algebra and solutions to the max-flow cut problem to efficiently solve the memory feasibility problem. Experimental results are presented to evaluate the efficiency of the proposed feasibility analysis techniques on synthetic workload and state-of-the-art benchmarks.REPOSITÓRIO P.PORTOCasini, DanielBiondi, AlessandroNelissen, GeoffreyButtazzo, Giorgio2019-02-07T16:40:11Z20182018-01-01T00:00:00Zconference objectinfo:eu-repo/semantics/publishedVersionapplication/pdfhttp://hdl.handle.net/10400.22/12864eng2576-317210.1109/RTSS.2018.00047info:eu-repo/semantics/openAccessreponame:Repositórios Científicos de Acesso Aberto de Portugal (RCAAP)instname:FCCN, serviços digitais da FCT – Fundação para a Ciência e a Tecnologiainstacron:RCAAP2025-04-02T02:53:28Zoai:recipp.ipp.pt:10400.22/12864Portal AgregadorONGhttps://www.rcaap.pt/oai/openaireinfo@rcaap.ptopendoar:https://opendoar.ac.uk/repository/71602025-05-29T00:26:18.833236Repositórios Científicos de Acesso Aberto de Portugal (RCAAP) - FCCN, serviços digitais da FCT – Fundação para a Ciência e a Tecnologiafalse
dc.title.none.fl_str_mv Memory Feasibility Analysis of Parallel Tasks Running on Scratchpad-Based Architectures
title Memory Feasibility Analysis of Parallel Tasks Running on Scratchpad-Based Architectures
spellingShingle Memory Feasibility Analysis of Parallel Tasks Running on Scratchpad-Based Architectures
Casini, Daniel
Real-time
Memory feasibility
Parallel tasks
Scratchpad memories
title_short Memory Feasibility Analysis of Parallel Tasks Running on Scratchpad-Based Architectures
title_full Memory Feasibility Analysis of Parallel Tasks Running on Scratchpad-Based Architectures
title_fullStr Memory Feasibility Analysis of Parallel Tasks Running on Scratchpad-Based Architectures
title_full_unstemmed Memory Feasibility Analysis of Parallel Tasks Running on Scratchpad-Based Architectures
title_sort Memory Feasibility Analysis of Parallel Tasks Running on Scratchpad-Based Architectures
author Casini, Daniel
author_facet Casini, Daniel
Biondi, Alessandro
Nelissen, Geoffrey
Buttazzo, Giorgio
author_role author
author2 Biondi, Alessandro
Nelissen, Geoffrey
Buttazzo, Giorgio
author2_role author
author
author
dc.contributor.none.fl_str_mv REPOSITÓRIO P.PORTO
dc.contributor.author.fl_str_mv Casini, Daniel
Biondi, Alessandro
Nelissen, Geoffrey
Buttazzo, Giorgio
dc.subject.por.fl_str_mv Real-time
Memory feasibility
Parallel tasks
Scratchpad memories
topic Real-time
Memory feasibility
Parallel tasks
Scratchpad memories
description This work proposes solutions for bounding the worst-case memory space requirement for parallel tasks running on multicore platforms with scratchpad memories. It introduces a feasibility test that verifies whether memories are large enough to contain the maximum memory backlog that may be generated by the system. Both closed-form bounds and more accurate algorithmic techniques are proposed. It is shown how one can use max-plus algebra and solutions to the max-flow cut problem to efficiently solve the memory feasibility problem. Experimental results are presented to evaluate the efficiency of the proposed feasibility analysis techniques on synthetic workload and state-of-the-art benchmarks.
publishDate 2018
dc.date.none.fl_str_mv 2018
2018-01-01T00:00:00Z
2019-02-07T16:40:11Z
dc.type.driver.fl_str_mv conference object
dc.type.status.fl_str_mv info:eu-repo/semantics/publishedVersion
status_str publishedVersion
dc.identifier.uri.fl_str_mv http://hdl.handle.net/10400.22/12864
url http://hdl.handle.net/10400.22/12864
dc.language.iso.fl_str_mv eng
language eng
dc.relation.none.fl_str_mv 2576-3172
10.1109/RTSS.2018.00047
dc.rights.driver.fl_str_mv info:eu-repo/semantics/openAccess
eu_rights_str_mv openAccess
dc.format.none.fl_str_mv application/pdf
dc.source.none.fl_str_mv reponame:Repositórios Científicos de Acesso Aberto de Portugal (RCAAP)
instname:FCCN, serviços digitais da FCT – Fundação para a Ciência e a Tecnologia
instacron:RCAAP
instname_str FCCN, serviços digitais da FCT – Fundação para a Ciência e a Tecnologia
instacron_str RCAAP
institution RCAAP
reponame_str Repositórios Científicos de Acesso Aberto de Portugal (RCAAP)
collection Repositórios Científicos de Acesso Aberto de Portugal (RCAAP)
repository.name.fl_str_mv Repositórios Científicos de Acesso Aberto de Portugal (RCAAP) - FCCN, serviços digitais da FCT – Fundação para a Ciência e a Tecnologia
repository.mail.fl_str_mv info@rcaap.pt
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