nDimNoC: Real-Time D-dimensional NoC
| Main Author: | |
|---|---|
| Publication Date: | 2021 |
| Other Authors: | , |
| Language: | eng |
| Source: | Repositórios Científicos de Acesso Aberto de Portugal (RCAAP) |
| Download full: | http://hdl.handle.net/10400.22/21770 |
Summary: | The growing demand of powerful embedded systems to perform advanced functionalities led to a large increase in the number of computation nodes integrated in Systems-on-chip (SoC). In this context, network-on-chips (NoCs) emerged as a new standard communication infrastructure for multi-processor SoCs (MPSoCs). In this work, we present nDimNoC, a new D-dimensional NoC that provides real-time guarantees for systems implemented upon MPSoCs. Specifically, (1) we propose a new router architecture and a new deflection-based routing policy that use the properties of circulant topologies to ensure bounded worst-case communication delays, and (2) we develop a generic worst-case communication time (WCCT) analysis for packets transmitted over nDimNoC. In our experiments, we show that the WCCT of packets decreases when we increase the dimensionality of the NoC using nDimNoC 19s topolgy and routing policy. By implementing nDimNoC in Verilog and synthesizing it for an FPGA platform, we show that a 3D-nDimNoC requires "485-times less silicon than routers that use virtual channels (VC). We computed the maximum operating frequency of a 3D-nDimNoC with Xilinx Vivado. Increasing the number dimensions in the NoC improves WCCT at the cost of a more complex routing logic that may result in a reduced operating clock frequency. |
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nDimNoC: Real-Time D-dimensional NoC230103Real-Time Embedded SystemsSystems-on-ChipsNetwork-on-ChipsWorstCase Communication TimeThe growing demand of powerful embedded systems to perform advanced functionalities led to a large increase in the number of computation nodes integrated in Systems-on-chip (SoC). In this context, network-on-chips (NoCs) emerged as a new standard communication infrastructure for multi-processor SoCs (MPSoCs). In this work, we present nDimNoC, a new D-dimensional NoC that provides real-time guarantees for systems implemented upon MPSoCs. Specifically, (1) we propose a new router architecture and a new deflection-based routing policy that use the properties of circulant topologies to ensure bounded worst-case communication delays, and (2) we develop a generic worst-case communication time (WCCT) analysis for packets transmitted over nDimNoC. In our experiments, we show that the WCCT of packets decreases when we increase the dimensionality of the NoC using nDimNoC 19s topolgy and routing policy. By implementing nDimNoC in Verilog and synthesizing it for an FPGA platform, we show that a 3D-nDimNoC requires "485-times less silicon than routers that use virtual channels (VC). We computed the maximum operating frequency of a 3D-nDimNoC with Xilinx Vivado. Increasing the number dimensions in the NoC improves WCCT at the cost of a more complex routing logic that may result in a reduced operating clock frequency.Dagstuhl PublishingREPOSITÓRIO P.PORTORibot, YilianNelissen, GeoffreyTovar, Eduardo2023-01-23T12:08:07Z2021-07-052021-07-05T00:00:00Zconference objectinfo:eu-repo/semantics/publishedVersionapplication/pdfhttp://hdl.handle.net/10400.22/21770eng10.4230/LIPIcs.ECRTS.2021.5info:eu-repo/semantics/openAccessreponame:Repositórios Científicos de Acesso Aberto de Portugal (RCAAP)instname:FCCN, serviços digitais da FCT – Fundação para a Ciência e a Tecnologiainstacron:RCAAP2025-04-02T02:55:55Zoai:recipp.ipp.pt:10400.22/21770Portal AgregadorONGhttps://www.rcaap.pt/oai/openaireinfo@rcaap.ptopendoar:https://opendoar.ac.uk/repository/71602025-05-29T00:28:38.427399Repositórios Científicos de Acesso Aberto de Portugal (RCAAP) - FCCN, serviços digitais da FCT – Fundação para a Ciência e a Tecnologiafalse |
| dc.title.none.fl_str_mv |
nDimNoC: Real-Time D-dimensional NoC 230103 |
| title |
nDimNoC: Real-Time D-dimensional NoC |
| spellingShingle |
nDimNoC: Real-Time D-dimensional NoC Ribot, Yilian Real-Time Embedded Systems Systems-on-Chips Network-on-Chips WorstCase Communication Time |
| title_short |
nDimNoC: Real-Time D-dimensional NoC |
| title_full |
nDimNoC: Real-Time D-dimensional NoC |
| title_fullStr |
nDimNoC: Real-Time D-dimensional NoC |
| title_full_unstemmed |
nDimNoC: Real-Time D-dimensional NoC |
| title_sort |
nDimNoC: Real-Time D-dimensional NoC |
| author |
Ribot, Yilian |
| author_facet |
Ribot, Yilian Nelissen, Geoffrey Tovar, Eduardo |
| author_role |
author |
| author2 |
Nelissen, Geoffrey Tovar, Eduardo |
| author2_role |
author author |
| dc.contributor.none.fl_str_mv |
REPOSITÓRIO P.PORTO |
| dc.contributor.author.fl_str_mv |
Ribot, Yilian Nelissen, Geoffrey Tovar, Eduardo |
| dc.subject.por.fl_str_mv |
Real-Time Embedded Systems Systems-on-Chips Network-on-Chips WorstCase Communication Time |
| topic |
Real-Time Embedded Systems Systems-on-Chips Network-on-Chips WorstCase Communication Time |
| description |
The growing demand of powerful embedded systems to perform advanced functionalities led to a large increase in the number of computation nodes integrated in Systems-on-chip (SoC). In this context, network-on-chips (NoCs) emerged as a new standard communication infrastructure for multi-processor SoCs (MPSoCs). In this work, we present nDimNoC, a new D-dimensional NoC that provides real-time guarantees for systems implemented upon MPSoCs. Specifically, (1) we propose a new router architecture and a new deflection-based routing policy that use the properties of circulant topologies to ensure bounded worst-case communication delays, and (2) we develop a generic worst-case communication time (WCCT) analysis for packets transmitted over nDimNoC. In our experiments, we show that the WCCT of packets decreases when we increase the dimensionality of the NoC using nDimNoC 19s topolgy and routing policy. By implementing nDimNoC in Verilog and synthesizing it for an FPGA platform, we show that a 3D-nDimNoC requires "485-times less silicon than routers that use virtual channels (VC). We computed the maximum operating frequency of a 3D-nDimNoC with Xilinx Vivado. Increasing the number dimensions in the NoC improves WCCT at the cost of a more complex routing logic that may result in a reduced operating clock frequency. |
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2021 |
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2021-07-05 2021-07-05T00:00:00Z 2023-01-23T12:08:07Z |
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conference object |
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info:eu-repo/semantics/publishedVersion |
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publishedVersion |
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http://hdl.handle.net/10400.22/21770 |
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eng |
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eng |
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10.4230/LIPIcs.ECRTS.2021.5 |
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openAccess |
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application/pdf |
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Dagstuhl Publishing |
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Dagstuhl Publishing |
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