Sistema integrado de baixo consumo para aquisição de ECG e cálculo da VFC

• Ano de defesa: 2020
• Autor(a) principal: Plantes Neto, Afonso Roberto
• Tipo de documento: Dissertação
• Tipo de acesso: Acesso aberto
• Idioma: por
• Instituição de defesa: Universidade Federal de Santa Maria; Brasil; Ciência da Computação; UFSM; Programa de Pós-Graduação em Ciência da Computação; Centro de Tecnologia
• Palavras-chave em Português: Front-end analógico; Sistema em chip; Eletrocardiografia; Detector QRS; Analog front-end; System on chip; Electrocardiograhy; QRS detector; CNPQ::CIENCIAS EXATAS E DA TERRA::CIENCIA DA COMPUTACAO
• Link de acesso: http://repositorio.ufsm.br/handle/1/20724

This work proposes a low power consumption analog front-end to acquire ECG signals and calculate heart rate variability (HRV), which has several biomedical applications. Many QRS detectors use digital techniques (software) to process the ECG and calculate HRV, adding more complexity and computational cost – using more energy. But performing detection with analog circuits can reduce area and power consumption, without complex circuits and analog-to-digital converters (ADCs). The proposed system contains an instrumentation amplifier – using techniques to reduce device mismatch and noise –, a bandpass filter with a cutoff frequency of 8-40 Hz, an energy derivative non-linear operator, a comparator, and some digital circuits to calculate HRV. The entire system is implemented using TSMC 180nm process design kit occupying an area of 0.086mm2 and consuming 6.52 μW from a 1.8V power supply. Heart rate detector performance is evaluated with the MIT-BIH arrhythmia database, using the metrics already established for comparison with other detectors. It was achived 96.55% sensitivity and 99.49% precision for the proposed detector using a fixed threshold. In addition, the influence of the error of the relative position of a detected beat in a beat classification algorithm is verified.