Modulador SI-ΣΔ cascata 2-2 empregando arquitetura de baixa distorção aplicado à conversão AD

• Ano de defesa: 2012
• Autor(a) principal: Blumer, Rafael Tambara
• Tipo de documento: Dissertação
• Tipo de acesso: Acesso aberto
• Idioma: por
• Instituição de defesa: Universidade Federal de Santa Maria; BR; Engenharia Elétrica; UFSM; Programa de Pós-Graduação em Engenharia Elétrica
• Palavras-chave em Português: Conversor AD; Modulador; Sigma-Delta; Corrente Chaveada; CMOS; AD Converter; Modulator; Switched-Current; CNPQ::ENGENHARIAS::ENGENHARIA ELETRICA
• Link de acesso: http://repositorio.ufsm.br/handle/1/8501

The increasing complexity of digital circuits forces the use of new technologies. New technologies have the advantage of reducing the circuit size and power consumption coupled with operation speed increasement. Most of signal processing operations migrated to the digital domain, thus, basic blocks like AD converters are needed in mixed-signal systems. Analog-todigital converters based on Sigma-Delta (ΣΔ) modulators stand out among the existing architectures because they cover a wide range of applications. The most common implementation of ΣΔ modulators in CMOS technology is based in switched-capacitor technique (SC), mainly due to its high performance and excellent linearity. However, the continuous reduction in the transistor physical dimensions requires a proportional reduction in the supply voltage levels, making difficult the design of analog circuits with conventional topologies. To overcome this problem, design techniques to analog circuits compatible with these new technologies were developed. This is the case of the technique known as switched-current (SI), which uses samples in the current domain to represent the signal information. This work presents the design of a switched-current Sigma-Delta modulator (SI-ΣΔM) using an architecture oriented to low-distortion applications. The architecture s main characteristic is the reduced sensitivity to integrator nonlinearities, leading to a significant increase in the signal-to-noise ratio (SNR) and dynamic range (DR) values, moreover, it permits the design of high-order modulators intrinsically stable. To demonstrate and verify the performance of the used strategy, based on a combination of circuit techniques and topology, a cascade 2-2 SI-ΣΔM was designed in a CMOS XFAB XC06 technology. Postlayout simulations show that the SNR reaches a maximum value of 80 dB and a dynamic range of approximately 87 dB, implying an effective resolution of 14.15 bits considering 20 kHz bandwidth. The prototype was sent to manufacturing and will be subject to laboratory tests when it returns.