Layout-Oriented Design of a 60 GHz Power Amplifier in SiGe Technology
Ano de defesa: | 2018 |
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Autor(a) principal: | |
Orientador(a): | |
Banca de defesa: | |
Tipo de documento: | Dissertação |
Tipo de acesso: | Acesso aberto |
Idioma: | por |
Instituição de defesa: |
Universidade Federal da Paraíba
Brasil Engenharia Elétrica Programa de Pós-Graduação em Engenharia Elétrica UFPB |
Programa de Pós-Graduação: |
Não Informado pela instituição
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Departamento: |
Não Informado pela instituição
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País: |
Não Informado pela instituição
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Palavras-chave em Português: | |
Link de acesso: | https://repositorio.ufpb.br/jspui/handle/123456789/13983 |
Resumo: | This work presents the design of a fully integrated cascode single-stage power amplifier for 60 GHz band. The technology used in the design was Global Foundries SiGe of 0.13µm (BiCMOS8HP). A load-pull analysis of the cascode was done including optimization of the bias and geometry parameters aiming at finding the best performance of this topology. A layout-oriented design approach was adopted to decide upon different combinations/arrangements of passive components and interconnections, aiming at reducing the global losses and, thus, increasing the energy efficiency of the amplifier. Post-layout simulations show a saturated output power of 19.32 dBm, 27.8% of power added efficiency (PAE) and a power gain of 10.4 dB at 60 GHz. The amplifier consumes 63 mA from a 4.4 V power supply and occupies an area of approximately 0,475 mm2. The circuitwastaped-outinlate2017.Experimentalresultsarepresentedattheendofthetext. |