Estudo de técnica utilizando a modulação PWM baseada em portadora aplicada ao inversores monofásicos assimétricos com diodos de grampeamento

• Ano de defesa: 2017
• Autor(a) principal: Oliveira, Francisco Hércules de
• Tipo de documento: Dissertação
• Tipo de acesso: Acesso aberto
• Idioma: por
• Instituição de defesa: Universidade Federal da Paraíba; Brasil; Engenharia Elétrica; Programa de Pós-Graduação em Engenharia Elétrica; UFPB
• Palavras-chave em Português: Modulação por largura de pulso; Inversores multiníveis assimétricos; Diodos de grampeamento; Distorção harmônica total; Matriz de porta programável em campo; Pulse width modulation,; Asymmetric multilevel inverters; Diodes clamped; Total harmonic distortion; Field programmable gate array; ENGENHARIAS::ENGENHARIA ELETRICA
• Link de acesso: https://repositorio.ufpb.br/jspui/handle/tede/9783

This work presents a technique using carrier-based pulse width modulation (PWM) applied to single-phase asymmetrical multilevel inverters with diodes clamped, aiming to increase the amount of output voltage levels to improve signal quality, reducing the total harmonic distortion rate (THD). The technique was used in inverters of three, four and five levels per arm, providing an output signal with seven, thirteen and nineteen levels respectively, presenting two, six and ten levels higher than the equivalent symmetrical multilevel inverters. The technique was described with a set of equations and procedures that can be generalized for inverters of any number of levels. To verify the operation, simulations were performed using the PSIM program and an experimental assembly of an asymmetrical multilevel inverter of three levels was performed, using a field programmable gate array device (FPGA) in the implementation of the PWM modulator. Finally, the simulation and experimental results that prove the effectiveness of the modulation strategy employed in this work are presented and compared