Srd: uma ferramenta de apoio ao projetista de sistemas de hardware utilizando a linguagem systemc

• Ano de defesa: 2007
• Autor(a) principal: Sandro Renato Dias
• Tipo de documento: Dissertação
• Tipo de acesso: Acesso aberto
• Idioma: por
• Instituição de defesa: Universidade Federal de Minas Gerais; UFMG
• Palavras-chave em Português: Refinamento sucessivo; Projeto de hardware; Soc; IP; Systemc; Engenharia elétrica
• Link de acesso: http://hdl.handle.net/1843/BUOS-8D3HRE

The hardware systems design has moved from pure hardware description languages (HDL), like Verilog and VHDL, to high level languages based on C/C++, aiming at a higher abstraction level mantaining the HDL semantics. Thus, the designer can change specific points in the design leaving other points at other abstraction levels. The successive refinement methodology allows this progressive improvement in the design code and the use of SystemC language allows the application of this methodology. This work presents a methodology and compares with similar ones. Also, presents tools and hardware design languages. Several abstraction levels were proposed in the literature and in this work proposes a level model with four levels of abstraction to apply the Successive Refinement Methodology with rules definitions necessary to move between levels. The present work also presents a tool designed with the objective to ease the hardware systems design. This tool, called SRD (Successive Refinement Design), allows the system designer to use graphical diagrams, guiding through the refinement steps, and in some cases executing the refinement steps. The tool generates all code files of the project in SystemC language, such that, the designer can simulates and/or sinthesizes the design.