Fluxo de geração e caracterização de bibliotecas de células padrão para aplicações de ultra-baixo consumo

Detalhes bibliográficos
Ano de defesa: 2019
Autor(a) principal: Michael Lopes de Oliveira
Orientador(a): Não Informado pela instituição
Banca de defesa: Não Informado pela instituição
Tipo de documento: Dissertação
Tipo de acesso: Acesso aberto
Idioma: por
Instituição de defesa: Universidade Federal de Minas Gerais
UFMG
Programa de Pós-Graduação: Não Informado pela instituição
Departamento: Não Informado pela instituição
País: Não Informado pela instituição
Palavras-chave em Português:
Link de acesso: http://hdl.handle.net/1843/RAOA-BCFJEW
Resumo: Many applications in the microelectronic field possess strong limited energy resources. Biomedical applications, RFID and wireless sensors networks can be used as example of those systems. In these applications, the main focus is on energy consumption in exchange for the overall system performance. Thus, there is a need for ultra-low power (ULP) designs, that enable processing with ultra-low energy consumption. One of the most common techniques toward this end is the use of supply voltages lower than the transistor threshold value, due to its quadractic relationship with the energy consumption. Having in mind that this metodology needs a redesign of existing circuits, there is a need to new flexible design flows, allowing the designer to generate standard cell libraries where he can choose the best tradeoff between the energy consumption and the performance of the destined application. In constrast to the state-of-art, which treats each parameter separately, the present work proposes a unique flow, capable of the complete generation of standard cell libraries for ultra-low power applications. The flow comprises the choose of the best supply voltage, the initial sizing parameters, the design, characterization and the verification of all cells that compose the library. The proposed flow was validated through simulations with an ARM-based processor and several testbench circuits from the ITC99 and EPFEL sets, using a 130nm technology. The flow was applied to generate a library for the supply voltages of 0.25V and 0.35V and results indicate that the flow can enable a reduction in the power dissipation of about 98% for the first and 95% for the last, while the performance degrades in a factor of 100 and 35, respectively.