Método de comando para conversores multiníveis com reduzido número de comutações: paralelismo de conversores estáticos

• Ano de defesa: 2012
• Autor(a) principal: David Mattos Andrade Avila
• Tipo de documento: Tese
• Tipo de acesso: Acesso aberto
• Idioma: por
• Instituição de defesa: Universidade Federal de Minas Gerais; UFMG
• Palavras-chave em Português: Engenharia Elétrica; Engenharia elétrica
• Link de acesso: http://hdl.handle.net/1843/BUOS-8T2KLJ

Multi-level inverters are suitable for applications with medium voltage and high power due to its many advantages over conventional two level inverters. In these applications the switching losses on the main switches and the tradeoff between this switching losses and the total harmonic distortion (THD) in the output voltage constitute important problems to be solved. One usual approach to solve this problem is the reduction of the switching frequency which, in turn, increases the THD in the output voltage. This paper presents a new modulation method for multilevel inverters, alternative to the most important methods, like carrier-based Sinusoidal Pulse Width Modulation (SPWM), Space Vector Pulse Width Modulation (SV-PWM) and Selective Harmonic Elimination (SHE). The proposed method reduces the switching losses in main switches in comparison with SPWM and SV-PWM methods, without the disadvantages of the SHE method of high output voltage THD and high computational cost of online calculation of switching angles. The proposed method is suitable to multi-level inverters with three or more levels. Its advantages compared to the SV-PWM method were verified by digital simulation of a system composed by a NPC 5 levels inverter driving a 4.16 kV, 0.5 MW induction motor. Experimental results using a digital signal processor (DSP) verify the performance of the proposed algorithm.