Contributions to the design and prototyping of GALS and asynchronous systems

• Ano de defesa: 2012
• Autor(a) principal: Moreira, Matheus Trevisan
• Orientador(a): Calazans, Ney Laert Vilar
• Tipo de documento: Dissertação
• Tipo de acesso: Acesso aberto
• Idioma: por
• Instituição de defesa: Pontifícia Universidade Católica do Rio Grande do Sul
• Programa de Pós-Graduação: Programa de Pós-Graduação em Ciência da Computação
• Departamento: Faculdade de Informáca
• País: BR
• Palavras-chave em Português: INFORMÁTICA; CIRCUITOS ASSÍNCRONOS; ARQUITETURA DE REDES; ROTEAMENTO - REDES DE COMPUTADORES
• Área do conhecimento CNPq: CNPQ::CIENCIAS EXATAS E DA TERRA::CIENCIA DA COMPUTACAO
• Link de acesso: http://tede2.pucrs.br/tede2/handle/tede/5174

As CMOS technology nodes scale dosn, nes problems a rise concerning the design of synchronous circuits and systems. This is due to tight constraints resulting from the use of a single signal to control a shole complex integrated circui t. Moreover, modern chips integrate shole systems that require a large amount of intellectual property cores, each sith specific requirements and design constraints. In this context, asynchronous design techniques present appealing solutions to help designers achieving efficient systems, as each core can be independently implemented and then employ asynchronous communication at the system level. Different sorks available in literature demonstrate that asynchronous circuits are sell suited for los poser, high speed and robust applications. Hose ver, these circuits are very difficult to be implemented, due to the lack of design automation tools and basic components. In this say, experiments sith asynchronous circuits are practica lly limited to full custom approaches. In order to help overcoming such limitations, the Author has been involved sith asynchronous circuits design for five years. This sork presents details o f part of this research sork, including the implementation of five non-synchronous netsork-on-c hip routers, a standard cell library sith over five hundred components for asynchronous circuits and a design flos proposed for such components