Alocação de tarefas e comunicação entre tarefas em MPSoCs

Detalhes bibliográficos
Ano de defesa: 2007
Autor(a) principal: Woszezenki, Cristiane Raquel
Orientador(a): Moraes, Fernando Gehm
Banca de defesa: Não Informado pela instituição
Tipo de documento: Dissertação
Tipo de acesso: Acesso aberto
Idioma: por
Instituição de defesa: Pontifícia Universidade Católica do Rio Grande do Sul
Porto Alegre
Programa de Pós-Graduação: Não Informado pela instituição
Departamento: Não Informado pela instituição
País: Não Informado pela instituição
Palavras-chave em Português:
Link de acesso: http://hdl.handle.net/10923/1500
Resumo: MPSoCs (Multiprocessor System on Chip) are an increasingly important trend in the design of embedded systems implemented as SoCs, since they facilitate the fulfillment of application requirements. This is because several processors, dedicated hardware modules memory blocks and interconnection media compose the architecture of such systems, making available a higher processing power when compared to equivalent monoprocessor systems. However, strategies to obtain the potential processing capacity offered by such architectures need to be better understood and explored. To enable evaluating such strategies, it is necessary to have available a hardware/software infrastructure capable to manage MPSoC tasks execution. From such an infrastructure, it should be possible, for example, to dynamically map tasks on processors, balancing the MPSoC workload through dynamic task allocation strategies. The state of the art in the available literature explores static and dynamic task allocation strategies on MPSoCs and evaluates their viability and efficiency. Nonetheless, the need to create the hardware/software infrastructure to enable strategy exploration constitutes a bottleneck for the advance of this technology. Additionally, most works employ quite abstract models to evaluate the proposed approaches, reducing the reliability of the reported results. The main contribution of the present work is the proposition and implementation of an MPSoC platform called HMPS (Hermes Multiprocessor System). HMPS offers a hardware/software infrastructure enabling to manage task execution in MPSoC systems. The HMPS platform is based on homogeneous multiprocessing, and has a master-slave architecture. The platform employs an network on chip (NoC) as interconnection media and allows that tasks be allocated either statically or dynamically. The platform allows several distinct allocation strategies to be implemented and evaluated at a quite detailed level of abstraction. HMPS is expected to be the starting point for several future works, contributing to the research on MPSoCs. This document presents the proposition and implementation of the HMPS platform. For the hardware infrastructure, the platform employs the open source processor Plasma and the HERMES NoC, implemented by the GAPH Research Group. Some specific hardware modules were developed for the platform and some changes were made in the Plasma processor, with the goal of connecting the processor to the NoC and supporting task allocation at each processor. As for the software infrastructure, HMPS provides a multitasking microkernel executing in each slave processor and the task allocation application running on the master processor. Two task allocation strategies are available in HMPS: one static and one dynamic.