Núcleo IP de uma bridge ethernet baseado em lógica reconfigurável e processador SoftCore

• Ano de defesa: 2007
• Autor(a) principal: Duarte, Fabio Sidiomar Zamperetti
• Orientador(a): Vargas, Fabian Luis
• Tipo de documento: Dissertação
• Tipo de acesso: Acesso aberto
• Idioma: por
• Instituição de defesa: Pontifícia Universidade Católica do Rio Grande do Sul; Porto Alegre
• Palavras-chave em Português: ENGENHARIA ELÉTRICA; TELECOMUNICAÇÕES; CIRCUITOS INTEGRADOS; REDES DE COMPUTADORES; ETHERNET; FPGA
• Link de acesso: http://hdl.handle.net/10923/3147

The constant increase of density in today´s programmable logic devices (FPGA’s), together with the lowering of prices of these integrated circuits, has been making possible the implementation of complex systems which, some time ago, would require dedicated integrated circuits. In designs where an FPGA is already in use, it is even easier to justify the integration of new functionalities to the programmable logic project, as the costs involving the software and hardware development tools have already been used. This work implements an Ethernet bridge using a system composed by softprocessor, where the functions related to the packet classification and forwarding are executed in software, what makes the system far more versatile and friendly to implementation changes in the future, as well as easy maintenance. Besides the softprocessor, implemented in VHDL there are the media access controller (MAC) and an HDLC controller, which is used as the connection point between the local and remote bridges. The prototyping of the system, to evaluate the performance, has been done using the software tools and development boards from Xilinx, since they were easily accessible and offer the MicroBlaze softprocessor IP core, a 32 bit RICS processor with harvard architecture. The performance analysis of the system, done with use of software tools like Iperf and hardware tools like SmartBits, has shown that the bridge was fast enough to handle small packets at a rate over 1Mbps. For larger packets, the performance was close to the 2Mbps, which represent the maximum typical rate where this bridge will be inserted in the real applications. Due to its extremely versatile nature, having been implemented using programmable logic and software functions, the system can handle the inclusion of new features in future activities, such as packet filtering, virtual LAN’s and the Spanning Tree Protocol. Besides these new software functionalities, new hardware modules can also be inserted, be it either to implement new features, such as the increase in the number of WAN interfaces, or to simply optimize existing logic blocks.