LUTS: A lightweight user-level transaction scheduler
Main Author: | |
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Publication Date: | 2011 |
Other Authors: | , |
Format: | Conference object |
Language: | eng |
Source: | Repositório Institucional da UNESP |
Download full: | http://dx.doi.org/10.1007/978-3-642-24650-0_13 http://hdl.handle.net/11449/72788 |
Summary: | Software Transactional Memory (STM) systems have poor performance under high contention scenarios. Since many transactions compete for the same data, most of them are aborted, wasting processor runtime. Contention management policies are typically used to avoid that, but they are passive approaches as they wait for an abort to happen so they can take action. More proactive approaches have emerged, trying to predict when a transaction is likely to abort so its execution can be delayed. Such techniques are limited, as they do not replace the doomed transaction by another or, when they do, they rely on the operating system for that, having little or no control on which transaction should run. In this paper we propose LUTS, a Lightweight User-Level Transaction Scheduler, which is based on an execution context record mechanism. Unlike other techniques, LUTS provides the means for selecting another transaction to run in parallel, thus improving system throughput. Moreover, it avoids most of the issues caused by pseudo parallelism, as it only launches as many system-level threads as the number of available processor cores. We discuss LUTS design and present three conflict-avoidance heuristics built around LUTS scheduling capabilities. Experimental results, conducted with STMBench7 and STAMP benchmark suites, show LUTS efficiency when running high contention applications and how conflict-avoidance heuristics can improve STM performance even more. In fact, our transaction scheduling techniques are capable of improving program performance even in overloaded scenarios. © 2011 Springer-Verlag. |
id |
UNSP_fa07d7490d5d57d9aec49e9d68ae1369 |
---|---|
oai_identifier_str |
oai:repositorio.unesp.br:11449/72788 |
network_acronym_str |
UNSP |
network_name_str |
Repositório Institucional da UNESP |
repository_id_str |
2946 |
spelling |
LUTS: A lightweight user-level transaction schedulerBenchmark suitesExecution contextImproving systemsManagement policyPoor performancePro-active approachProcessor coresProgram performanceRuntimesSoftware transactional memorySystem levelsTransaction schedulingAlgorithmsBenchmarkingJava programming languageMemory architectureParallel processing systemsSoftware Transactional Memory (STM) systems have poor performance under high contention scenarios. Since many transactions compete for the same data, most of them are aborted, wasting processor runtime. Contention management policies are typically used to avoid that, but they are passive approaches as they wait for an abort to happen so they can take action. More proactive approaches have emerged, trying to predict when a transaction is likely to abort so its execution can be delayed. Such techniques are limited, as they do not replace the doomed transaction by another or, when they do, they rely on the operating system for that, having little or no control on which transaction should run. In this paper we propose LUTS, a Lightweight User-Level Transaction Scheduler, which is based on an execution context record mechanism. Unlike other techniques, LUTS provides the means for selecting another transaction to run in parallel, thus improving system throughput. Moreover, it avoids most of the issues caused by pseudo parallelism, as it only launches as many system-level threads as the number of available processor cores. We discuss LUTS design and present three conflict-avoidance heuristics built around LUTS scheduling capabilities. Experimental results, conducted with STMBench7 and STAMP benchmark suites, show LUTS efficiency when running high contention applications and how conflict-avoidance heuristics can improve STM performance even more. In fact, our transaction scheduling techniques are capable of improving program performance even in overloaded scenarios. © 2011 Springer-Verlag.IC-UNICAMPUNESP - Univ. Estadual Paulista, Rio ClaroUNESP - Univ. Estadual Paulista, Rio ClaroUniversidade Estadual de Campinas (UNICAMP)Universidade Estadual Paulista (Unesp)Nicácio, DanielBaldassin, Alexandro [UNESP]Araújo, Guido2014-05-27T11:26:06Z2014-05-27T11:26:06Z2011-11-09info:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/conferenceObject144-157http://dx.doi.org/10.1007/978-3-642-24650-0_13Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), v. 7016 LNCS, n. PART 1, p. 144-157, 2011.0302-97431611-3349http://hdl.handle.net/11449/7278810.1007/978-3-642-24650-0_132-s2.0-80455173580Scopusreponame:Repositório Institucional da UNESPinstname:Universidade Estadual Paulista (UNESP)instacron:UNESPengLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)0,295info:eu-repo/semantics/openAccess2024-11-27T14:10:26Zoai:repositorio.unesp.br:11449/72788Repositório InstitucionalPUBhttp://repositorio.unesp.br/oai/requestrepositoriounesp@unesp.bropendoar:29462024-11-27T14:10:26Repositório Institucional da UNESP - Universidade Estadual Paulista (UNESP)false |
dc.title.none.fl_str_mv |
LUTS: A lightweight user-level transaction scheduler |
title |
LUTS: A lightweight user-level transaction scheduler |
spellingShingle |
LUTS: A lightweight user-level transaction scheduler Nicácio, Daniel Benchmark suites Execution context Improving systems Management policy Poor performance Pro-active approach Processor cores Program performance Runtimes Software transactional memory System levels Transaction scheduling Algorithms Benchmarking Java programming language Memory architecture Parallel processing systems |
title_short |
LUTS: A lightweight user-level transaction scheduler |
title_full |
LUTS: A lightweight user-level transaction scheduler |
title_fullStr |
LUTS: A lightweight user-level transaction scheduler |
title_full_unstemmed |
LUTS: A lightweight user-level transaction scheduler |
title_sort |
LUTS: A lightweight user-level transaction scheduler |
author |
Nicácio, Daniel |
author_facet |
Nicácio, Daniel Baldassin, Alexandro [UNESP] Araújo, Guido |
author_role |
author |
author2 |
Baldassin, Alexandro [UNESP] Araújo, Guido |
author2_role |
author author |
dc.contributor.none.fl_str_mv |
Universidade Estadual de Campinas (UNICAMP) Universidade Estadual Paulista (Unesp) |
dc.contributor.author.fl_str_mv |
Nicácio, Daniel Baldassin, Alexandro [UNESP] Araújo, Guido |
dc.subject.por.fl_str_mv |
Benchmark suites Execution context Improving systems Management policy Poor performance Pro-active approach Processor cores Program performance Runtimes Software transactional memory System levels Transaction scheduling Algorithms Benchmarking Java programming language Memory architecture Parallel processing systems |
topic |
Benchmark suites Execution context Improving systems Management policy Poor performance Pro-active approach Processor cores Program performance Runtimes Software transactional memory System levels Transaction scheduling Algorithms Benchmarking Java programming language Memory architecture Parallel processing systems |
description |
Software Transactional Memory (STM) systems have poor performance under high contention scenarios. Since many transactions compete for the same data, most of them are aborted, wasting processor runtime. Contention management policies are typically used to avoid that, but they are passive approaches as they wait for an abort to happen so they can take action. More proactive approaches have emerged, trying to predict when a transaction is likely to abort so its execution can be delayed. Such techniques are limited, as they do not replace the doomed transaction by another or, when they do, they rely on the operating system for that, having little or no control on which transaction should run. In this paper we propose LUTS, a Lightweight User-Level Transaction Scheduler, which is based on an execution context record mechanism. Unlike other techniques, LUTS provides the means for selecting another transaction to run in parallel, thus improving system throughput. Moreover, it avoids most of the issues caused by pseudo parallelism, as it only launches as many system-level threads as the number of available processor cores. We discuss LUTS design and present three conflict-avoidance heuristics built around LUTS scheduling capabilities. Experimental results, conducted with STMBench7 and STAMP benchmark suites, show LUTS efficiency when running high contention applications and how conflict-avoidance heuristics can improve STM performance even more. In fact, our transaction scheduling techniques are capable of improving program performance even in overloaded scenarios. © 2011 Springer-Verlag. |
publishDate |
2011 |
dc.date.none.fl_str_mv |
2011-11-09 2014-05-27T11:26:06Z 2014-05-27T11:26:06Z |
dc.type.status.fl_str_mv |
info:eu-repo/semantics/publishedVersion |
dc.type.driver.fl_str_mv |
info:eu-repo/semantics/conferenceObject |
format |
conferenceObject |
status_str |
publishedVersion |
dc.identifier.uri.fl_str_mv |
http://dx.doi.org/10.1007/978-3-642-24650-0_13 Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), v. 7016 LNCS, n. PART 1, p. 144-157, 2011. 0302-9743 1611-3349 http://hdl.handle.net/11449/72788 10.1007/978-3-642-24650-0_13 2-s2.0-80455173580 |
url |
http://dx.doi.org/10.1007/978-3-642-24650-0_13 http://hdl.handle.net/11449/72788 |
identifier_str_mv |
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), v. 7016 LNCS, n. PART 1, p. 144-157, 2011. 0302-9743 1611-3349 10.1007/978-3-642-24650-0_13 2-s2.0-80455173580 |
dc.language.iso.fl_str_mv |
eng |
language |
eng |
dc.relation.none.fl_str_mv |
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) 0,295 |
dc.rights.driver.fl_str_mv |
info:eu-repo/semantics/openAccess |
eu_rights_str_mv |
openAccess |
dc.format.none.fl_str_mv |
144-157 |
dc.source.none.fl_str_mv |
Scopus reponame:Repositório Institucional da UNESP instname:Universidade Estadual Paulista (UNESP) instacron:UNESP |
instname_str |
Universidade Estadual Paulista (UNESP) |
instacron_str |
UNESP |
institution |
UNESP |
reponame_str |
Repositório Institucional da UNESP |
collection |
Repositório Institucional da UNESP |
repository.name.fl_str_mv |
Repositório Institucional da UNESP - Universidade Estadual Paulista (UNESP) |
repository.mail.fl_str_mv |
repositoriounesp@unesp.br |
_version_ |
1834483338526588928 |