FPGA-based power meter implementation for three-phase three-wire and four-wire power systems, according to IEEE 1459-2010 standard

• Main Author: De Oro Arenas, Luis [UNESP]
• Publication Date: 2018
• Other Authors: E Melo, Guilherme A. [UNESP], Canesin, Carlos A. [UNESP]
• Format: Conference object
• Language: eng
• Source: Repositório Institucional da UNESP
• Download full: http://dx.doi.org/10.1109/COBEP.2017.8257373; http://hdl.handle.net/11449/180060
• topic: FPGA Devices; IEEE 1459-2010; Power Measurement; Power Quality; Smart Meters

This paper proposes an electric power measurement implementation by using an FPGA (Field Programmable Gate Arrays) device, based on the power calculation theory defined by the IEEE 1459-2010 Standard. The modules synthesized in the programmable logic device (PLD) are fully developed in a hardware description language (HDL), allowing the control over all variables and signals present in the system. This methodology attends the windowing specifications established by the NBR IEC 61000-4-30:2011 Standard for power quality measurement methods. Finally, the hardware structure described in the FPGA and the developed analog signal conditioning platform are presented along with experimental results for three-phase power systems in several scenarios.