Low-pass CMOS Sigma-Delta Converter

Bibliographic Details
Main Author: Diogo Dinis da Fonseca
Publication Date: 2018
Format: Master thesis
Language: eng
Source: Repositórios Científicos de Acesso Aberto de Portugal (RCAAP)
Download full: https://hdl.handle.net/10216/114123
Summary: The growing need to provide better health for the population requires the development of new and better medical devices. Portable devices for the analysis of biological signals, such as the electrocardiogram or electroencephalogram, is nowadays an important development, helping health professionals to come up with fast diagnoses on the field, or even for use by citizens who require constant vigilance . Developing these devices brings new challenges to the scientific community, namely at the analog/digital interface, the quality of data and power consumption. In order to design a good medical device it is necessary an analog/digital converter for low frequencies, with low power consumption and high resolution. This dissertation begins by providing the reader with the basic theory of analog/digital (ADC) and its state of the art. The main goal of the work is the design of an ADC based on a Sigma-Delta architecture that meets the necessary medical requirements. The converter was implemented in a 130 nm CMOS technology using a sampling frequency of 1 MHz, with a bandwidth of 1 kHz, and a source voltage of 1.2 V. The integrators of sigma-delta employs an unusual Opamp typology in order to reach a high gain, without resourcing to cascode techniques. The quantizer has a resolution of 1.5 bits and is realized with two dynamic comparators, in order to minimize power consumption.
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spelling Low-pass CMOS Sigma-Delta ConverterEngenharia electrotécnica, electrónica e informáticaElectrical engineering, Electronic engineering, Information engineeringThe growing need to provide better health for the population requires the development of new and better medical devices. Portable devices for the analysis of biological signals, such as the electrocardiogram or electroencephalogram, is nowadays an important development, helping health professionals to come up with fast diagnoses on the field, or even for use by citizens who require constant vigilance . Developing these devices brings new challenges to the scientific community, namely at the analog/digital interface, the quality of data and power consumption. In order to design a good medical device it is necessary an analog/digital converter for low frequencies, with low power consumption and high resolution. This dissertation begins by providing the reader with the basic theory of analog/digital (ADC) and its state of the art. The main goal of the work is the design of an ADC based on a Sigma-Delta architecture that meets the necessary medical requirements. The converter was implemented in a 130 nm CMOS technology using a sampling frequency of 1 MHz, with a bandwidth of 1 kHz, and a source voltage of 1.2 V. The integrators of sigma-delta employs an unusual Opamp typology in order to reach a high gain, without resourcing to cascode techniques. The quantizer has a resolution of 1.5 bits and is realized with two dynamic comparators, in order to minimize power consumption.2018-07-232018-07-23T00:00:00Zinfo:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/masterThesisapplication/pdfhttps://hdl.handle.net/10216/114123TID:202113841engDiogo Dinis da Fonsecainfo:eu-repo/semantics/openAccessreponame:Repositórios Científicos de Acesso Aberto de Portugal (RCAAP)instname:FCCN, serviços digitais da FCT – Fundação para a Ciência e a Tecnologiainstacron:RCAAP2025-02-27T16:39:44Zoai:repositorio-aberto.up.pt:10216/114123Portal AgregadorONGhttps://www.rcaap.pt/oai/openaireinfo@rcaap.ptopendoar:https://opendoar.ac.uk/repository/71602025-05-28T21:49:22.261389Repositórios Científicos de Acesso Aberto de Portugal (RCAAP) - FCCN, serviços digitais da FCT – Fundação para a Ciência e a Tecnologiafalse
dc.title.none.fl_str_mv Low-pass CMOS Sigma-Delta Converter
title Low-pass CMOS Sigma-Delta Converter
spellingShingle Low-pass CMOS Sigma-Delta Converter
Diogo Dinis da Fonseca
Engenharia electrotécnica, electrónica e informática
Electrical engineering, Electronic engineering, Information engineering
title_short Low-pass CMOS Sigma-Delta Converter
title_full Low-pass CMOS Sigma-Delta Converter
title_fullStr Low-pass CMOS Sigma-Delta Converter
title_full_unstemmed Low-pass CMOS Sigma-Delta Converter
title_sort Low-pass CMOS Sigma-Delta Converter
author Diogo Dinis da Fonseca
author_facet Diogo Dinis da Fonseca
author_role author
dc.contributor.author.fl_str_mv Diogo Dinis da Fonseca
dc.subject.por.fl_str_mv Engenharia electrotécnica, electrónica e informática
Electrical engineering, Electronic engineering, Information engineering
topic Engenharia electrotécnica, electrónica e informática
Electrical engineering, Electronic engineering, Information engineering
description The growing need to provide better health for the population requires the development of new and better medical devices. Portable devices for the analysis of biological signals, such as the electrocardiogram or electroencephalogram, is nowadays an important development, helping health professionals to come up with fast diagnoses on the field, or even for use by citizens who require constant vigilance . Developing these devices brings new challenges to the scientific community, namely at the analog/digital interface, the quality of data and power consumption. In order to design a good medical device it is necessary an analog/digital converter for low frequencies, with low power consumption and high resolution. This dissertation begins by providing the reader with the basic theory of analog/digital (ADC) and its state of the art. The main goal of the work is the design of an ADC based on a Sigma-Delta architecture that meets the necessary medical requirements. The converter was implemented in a 130 nm CMOS technology using a sampling frequency of 1 MHz, with a bandwidth of 1 kHz, and a source voltage of 1.2 V. The integrators of sigma-delta employs an unusual Opamp typology in order to reach a high gain, without resourcing to cascode techniques. The quantizer has a resolution of 1.5 bits and is realized with two dynamic comparators, in order to minimize power consumption.
publishDate 2018
dc.date.none.fl_str_mv 2018-07-23
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