Tool to Support Computer Architecture Teaching and Learning

Bibliographic Details
Main Author: Bruno Miguel Barroso da Nova
Publication Date: 2013
Format: Master thesis
Language: eng
Source: Repositórios Científicos de Acesso Aberto de Portugal (RCAAP)
Download full: https://hdl.handle.net/10216/68509
Summary: Computer architecture is an important subject for informatics and electrical engineering courses, where students get to know how a CPU works internally. However, the students exhibit some difficulties in this subject. This is due to the lack of versatile educational tools that simulate the operation of a processor in an intuitive, integrated, graphical and configurable way. One of the most used processor architectures for teaching computer architecture is MIPS. The architecture has a few different versions, but the most used for teaching are the unicycle and the 5-stage pipeline. In this dissertation, an educational MIPS simulator, DrMIPS, is described. This tool simulates the execution of an assembly program on the CPU, step-by-step, and displays the status of the datapath graphically. Registers, data memory and assembled code are also displayed, and a "performance mode" for latencies and critical path analysis is also provided. Both unicycle and pipeline implementations are supported and the CPUs and their instruction sets are configurable. The pipeline implementation includes complete hazard detection and resolution. The tool seeks to help students to understand topics like the composition and operation of a datapath, pipelining, instruction encoding and processor measuring. It is available not only for PCs but also for Android tablets. None of the other existing tools have a version for Android and this is a platform that is becoming very popular. The tool supports multiple languages and is fairly intuitive and versatile on both platforms.
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spelling Tool to Support Computer Architecture Teaching and LearningEngenharia electrotécnica, electrónica e informáticaElectrical engineering, Electronic engineering, Information engineeringComputer architecture is an important subject for informatics and electrical engineering courses, where students get to know how a CPU works internally. However, the students exhibit some difficulties in this subject. This is due to the lack of versatile educational tools that simulate the operation of a processor in an intuitive, integrated, graphical and configurable way. One of the most used processor architectures for teaching computer architecture is MIPS. The architecture has a few different versions, but the most used for teaching are the unicycle and the 5-stage pipeline. In this dissertation, an educational MIPS simulator, DrMIPS, is described. This tool simulates the execution of an assembly program on the CPU, step-by-step, and displays the status of the datapath graphically. Registers, data memory and assembled code are also displayed, and a "performance mode" for latencies and critical path analysis is also provided. Both unicycle and pipeline implementations are supported and the CPUs and their instruction sets are configurable. The pipeline implementation includes complete hazard detection and resolution. The tool seeks to help students to understand topics like the composition and operation of a datapath, pipelining, instruction encoding and processor measuring. It is available not only for PCs but also for Android tablets. None of the other existing tools have a version for Android and this is a platform that is becoming very popular. The tool supports multiple languages and is fairly intuitive and versatile on both platforms.2013-07-152013-07-15T00:00:00Zinfo:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/masterThesisapplication/pdfhttps://hdl.handle.net/10216/68509engBruno Miguel Barroso da Novainfo:eu-repo/semantics/openAccessreponame:Repositórios Científicos de Acesso Aberto de Portugal (RCAAP)instname:FCCN, serviços digitais da FCT – Fundação para a Ciência e a Tecnologiainstacron:RCAAP2025-02-27T20:07:12Zoai:repositorio-aberto.up.pt:10216/68509Portal AgregadorONGhttps://www.rcaap.pt/oai/openaireinfo@rcaap.ptopendoar:https://opendoar.ac.uk/repository/71602025-05-28T23:50:56.292186Repositórios Científicos de Acesso Aberto de Portugal (RCAAP) - FCCN, serviços digitais da FCT – Fundação para a Ciência e a Tecnologiafalse
dc.title.none.fl_str_mv Tool to Support Computer Architecture Teaching and Learning
title Tool to Support Computer Architecture Teaching and Learning
spellingShingle Tool to Support Computer Architecture Teaching and Learning
Bruno Miguel Barroso da Nova
Engenharia electrotécnica, electrónica e informática
Electrical engineering, Electronic engineering, Information engineering
title_short Tool to Support Computer Architecture Teaching and Learning
title_full Tool to Support Computer Architecture Teaching and Learning
title_fullStr Tool to Support Computer Architecture Teaching and Learning
title_full_unstemmed Tool to Support Computer Architecture Teaching and Learning
title_sort Tool to Support Computer Architecture Teaching and Learning
author Bruno Miguel Barroso da Nova
author_facet Bruno Miguel Barroso da Nova
author_role author
dc.contributor.author.fl_str_mv Bruno Miguel Barroso da Nova
dc.subject.por.fl_str_mv Engenharia electrotécnica, electrónica e informática
Electrical engineering, Electronic engineering, Information engineering
topic Engenharia electrotécnica, electrónica e informática
Electrical engineering, Electronic engineering, Information engineering
description Computer architecture is an important subject for informatics and electrical engineering courses, where students get to know how a CPU works internally. However, the students exhibit some difficulties in this subject. This is due to the lack of versatile educational tools that simulate the operation of a processor in an intuitive, integrated, graphical and configurable way. One of the most used processor architectures for teaching computer architecture is MIPS. The architecture has a few different versions, but the most used for teaching are the unicycle and the 5-stage pipeline. In this dissertation, an educational MIPS simulator, DrMIPS, is described. This tool simulates the execution of an assembly program on the CPU, step-by-step, and displays the status of the datapath graphically. Registers, data memory and assembled code are also displayed, and a "performance mode" for latencies and critical path analysis is also provided. Both unicycle and pipeline implementations are supported and the CPUs and their instruction sets are configurable. The pipeline implementation includes complete hazard detection and resolution. The tool seeks to help students to understand topics like the composition and operation of a datapath, pipelining, instruction encoding and processor measuring. It is available not only for PCs but also for Android tablets. None of the other existing tools have a version for Android and this is a platform that is becoming very popular. The tool supports multiple languages and is fairly intuitive and versatile on both platforms.
publishDate 2013
dc.date.none.fl_str_mv 2013-07-15
2013-07-15T00:00:00Z
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