Onboard processing of synthetic aperture radar backprojection algorithm in FPGA

Bibliographic Details
Main Author: Mota, David
Publication Date: 2022
Other Authors: Cruz, Helena, Miranda, Pedro R., Duarte, Rui Policarpo, De Sousa, Jose, Cláudio de Campos Neto, Horácio, Véstias, Mário
Format: Article
Language: eng
Source: Repositórios Científicos de Acesso Aberto de Portugal (RCAAP)
Download full: http://hdl.handle.net/10400.21/16064
Summary: Synthetic aperture radar is a microwave technique to extracting image information of the target. Electromagnetic waves that are reflected from the target are acquired by the aircraft or satellite receivers and sent to a ground station to be processed by applying computational demanding algorithms. Radar data streams are acquired by an aircraft or satellite and sent to a ground station to be processed in order to extract images from the data since these processing algorithms are computationally demanding. However, novel applications require real-time processing for real-time analysis and decisions and so onboard processing is necessary. Running computationally demanding algorithms on onboard embedded systems with limited energy and computational capacity is a challenge. This article proposes a configurable hardware core for the execution of the backprojection algorithm with high performance and energy efficiency. The original backprojection algorithm is restructured to expose computational parallelism and then optimized by replacing floating-point with fixed-point arithmetic. The backprojection core was integrated into a system-onchip architecture and implemented in a field-programmable gate array. The proposed solution runs the optimized backprojection algorithm over images of sizes 512 x 512 and 1024 x 1024 in 0.14 s (0.41 J) and 1.11 s (3.24 J), respectively. The architecture is 2.6x faster and consumes 13x less energy than an embedded Jetson TX2 GPU. The solution is scalable and, therefore, a tradeoff exists between performance and utilization of resources.
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spelling Onboard processing of synthetic aperture radar backprojection algorithm in FPGAField-programmable gate arrays (FPGA)Onboard processingReal-timeSynthetic aperture radar (SAR)Synthetic aperture radar is a microwave technique to extracting image information of the target. Electromagnetic waves that are reflected from the target are acquired by the aircraft or satellite receivers and sent to a ground station to be processed by applying computational demanding algorithms. Radar data streams are acquired by an aircraft or satellite and sent to a ground station to be processed in order to extract images from the data since these processing algorithms are computationally demanding. However, novel applications require real-time processing for real-time analysis and decisions and so onboard processing is necessary. Running computationally demanding algorithms on onboard embedded systems with limited energy and computational capacity is a challenge. This article proposes a configurable hardware core for the execution of the backprojection algorithm with high performance and energy efficiency. The original backprojection algorithm is restructured to expose computational parallelism and then optimized by replacing floating-point with fixed-point arithmetic. The backprojection core was integrated into a system-onchip architecture and implemented in a field-programmable gate array. The proposed solution runs the optimized backprojection algorithm over images of sizes 512 x 512 and 1024 x 1024 in 0.14 s (0.41 J) and 1.11 s (3.24 J), respectively. The architecture is 2.6x faster and consumes 13x less energy than an embedded Jetson TX2 GPU. The solution is scalable and, therefore, a tradeoff exists between performance and utilization of resources.IEEERCIPLMota, DavidCruz, HelenaMiranda, Pedro R.Duarte, Rui PolicarpoDe Sousa, JoseCláudio de Campos Neto, HorácioVéstias, Mário2023-05-17T14:46:08Z2022-04-252022-04-25T00:00:00Zinfo:eu-repo/semantics/publishedVersioninfo:eu-repo/semantics/articleapplication/pdfhttp://hdl.handle.net/10400.21/16064eng1939-140410.1109/JSTARS.2022.3169828info:eu-repo/semantics/openAccessreponame:Repositórios Científicos de Acesso Aberto de Portugal (RCAAP)instname:FCCN, serviços digitais da FCT – Fundação para a Ciência e a Tecnologiainstacron:RCAAP2025-02-12T07:51:23Zoai:repositorio.ipl.pt:10400.21/16064Portal AgregadorONGhttps://www.rcaap.pt/oai/openaireinfo@rcaap.ptopendoar:https://opendoar.ac.uk/repository/71602025-05-28T19:51:51.904281Repositórios Científicos de Acesso Aberto de Portugal (RCAAP) - FCCN, serviços digitais da FCT – Fundação para a Ciência e a Tecnologiafalse
dc.title.none.fl_str_mv Onboard processing of synthetic aperture radar backprojection algorithm in FPGA
title Onboard processing of synthetic aperture radar backprojection algorithm in FPGA
spellingShingle Onboard processing of synthetic aperture radar backprojection algorithm in FPGA
Mota, David
Field-programmable gate arrays (FPGA)
Onboard processing
Real-time
Synthetic aperture radar (SAR)
title_short Onboard processing of synthetic aperture radar backprojection algorithm in FPGA
title_full Onboard processing of synthetic aperture radar backprojection algorithm in FPGA
title_fullStr Onboard processing of synthetic aperture radar backprojection algorithm in FPGA
title_full_unstemmed Onboard processing of synthetic aperture radar backprojection algorithm in FPGA
title_sort Onboard processing of synthetic aperture radar backprojection algorithm in FPGA
author Mota, David
author_facet Mota, David
Cruz, Helena
Miranda, Pedro R.
Duarte, Rui Policarpo
De Sousa, Jose
Cláudio de Campos Neto, Horácio
Véstias, Mário
author_role author
author2 Cruz, Helena
Miranda, Pedro R.
Duarte, Rui Policarpo
De Sousa, Jose
Cláudio de Campos Neto, Horácio
Véstias, Mário
author2_role author
author
author
author
author
author
dc.contributor.none.fl_str_mv RCIPL
dc.contributor.author.fl_str_mv Mota, David
Cruz, Helena
Miranda, Pedro R.
Duarte, Rui Policarpo
De Sousa, Jose
Cláudio de Campos Neto, Horácio
Véstias, Mário
dc.subject.por.fl_str_mv Field-programmable gate arrays (FPGA)
Onboard processing
Real-time
Synthetic aperture radar (SAR)
topic Field-programmable gate arrays (FPGA)
Onboard processing
Real-time
Synthetic aperture radar (SAR)
description Synthetic aperture radar is a microwave technique to extracting image information of the target. Electromagnetic waves that are reflected from the target are acquired by the aircraft or satellite receivers and sent to a ground station to be processed by applying computational demanding algorithms. Radar data streams are acquired by an aircraft or satellite and sent to a ground station to be processed in order to extract images from the data since these processing algorithms are computationally demanding. However, novel applications require real-time processing for real-time analysis and decisions and so onboard processing is necessary. Running computationally demanding algorithms on onboard embedded systems with limited energy and computational capacity is a challenge. This article proposes a configurable hardware core for the execution of the backprojection algorithm with high performance and energy efficiency. The original backprojection algorithm is restructured to expose computational parallelism and then optimized by replacing floating-point with fixed-point arithmetic. The backprojection core was integrated into a system-onchip architecture and implemented in a field-programmable gate array. The proposed solution runs the optimized backprojection algorithm over images of sizes 512 x 512 and 1024 x 1024 in 0.14 s (0.41 J) and 1.11 s (3.24 J), respectively. The architecture is 2.6x faster and consumes 13x less energy than an embedded Jetson TX2 GPU. The solution is scalable and, therefore, a tradeoff exists between performance and utilization of resources.
publishDate 2022
dc.date.none.fl_str_mv 2022-04-25
2022-04-25T00:00:00Z
2023-05-17T14:46:08Z
dc.type.status.fl_str_mv info:eu-repo/semantics/publishedVersion
dc.type.driver.fl_str_mv info:eu-repo/semantics/article
format article
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dc.identifier.uri.fl_str_mv http://hdl.handle.net/10400.21/16064
url http://hdl.handle.net/10400.21/16064
dc.language.iso.fl_str_mv eng
language eng
dc.relation.none.fl_str_mv 1939-1404
10.1109/JSTARS.2022.3169828
dc.rights.driver.fl_str_mv info:eu-repo/semantics/openAccess
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dc.format.none.fl_str_mv application/pdf
dc.publisher.none.fl_str_mv IEEE
publisher.none.fl_str_mv IEEE
dc.source.none.fl_str_mv reponame:Repositórios Científicos de Acesso Aberto de Portugal (RCAAP)
instname:FCCN, serviços digitais da FCT – Fundação para a Ciência e a Tecnologia
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reponame_str Repositórios Científicos de Acesso Aberto de Portugal (RCAAP)
collection Repositórios Científicos de Acesso Aberto de Portugal (RCAAP)
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repository.mail.fl_str_mv info@rcaap.pt
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