Real-time bird audio detection using AI on FPGAs

• Autor(a) principal: Silva, Rodrigo Lopes da
• Data de Publicação: 2024
• Tipo de documento: Dissertação
• Idioma: eng
• Título da fonte: Repositórios Científicos de Acesso Aberto de Portugal (RCAAP)
• Texto Completo: http://hdl.handle.net/10400.21/21564
• topic: Bird audio detection; Bird audio detection challenge; Convolutional neural network; Recurrent neural network; Gated recurrent unit; TensorFlow; QK-eras; Quantization; FPGA; Hardware accelerator; High-level synthesis; Detecção de áudio de pássaros; Desafio de detecção de áudio de pássaros; Rede neural convolucional; Rede neural recorrente; Quantização; Acelerador de hardware; Síntese de alto nível

Abstract Audio-based monitoring offers a discreet solution for studying biodiversity behavior in remote or sensitive environments like forests. This work addresses the need for efficient wildlife monitoring, focusing on avian species using audio detection. This work optimizes one of the models related to the Bird Audio Detection Challenge (BADC), designs a hardware accelerator for the algorithm, and implements it in a System-on-Chip Field Programmable Gate Array (Xilinx Zynq UltraScale+ ZU3CG SoC). The model weights and activations are quantized and fine-tuned to improve the hardware performance and reduce resource usage without sacrificing much accuracy. The accelerator has different levels of quantization, 4 bits for the Convolution layers and 8 bits for the Gated Recurrent Unit (GRU) layers, implemented in the FPGA and integrated with the processor of the SoC-FPGA. The results show that the system has an accuracy of 79.5%, with reduced accuracy compared to the software Python model (89.75%). Still, it is acceptable since the objective is to reduce the model, implement it in hardware, and target 1 second or less evaluation time. The evaluation performance has a latency of 679ms, fulfilling the target delay of 1s. This work uniquely demonstrates the process of selecting a model, quantizing it, replicating the Python model in C, and implementing it into an FPGA. This represents a new project approach for a bird audio detection system within the scope of the BADC.